M. Juvonen, J. Coutinho, J. Wang
Dec 11, 2005
Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005.
This paper describes the design and implementation of hardware architectures for posture analysis. Posture analysis is an active research area in computer vision for home care environments and security. We report four contributions in this paper: (a) requirements for a posture analysis system with hardware support; (b) a workflow for posture analysis that fulfills these requirements; (c) new architectures and their implementation based on a high level hardware design approach; and (d) performance evaluation for our derived designs. One of our designs, which targets a Xilinx XC2V6000 FPGA at 90.2 MHz, is able to perform posture analysis at a rate of 1164 frames per second with frame size of 320 times 240 pixels, or 220 frames per second for DVD quality of 720 times 576 pixels per frame. It represents a 145-fold speedup over a software version running on a 3 GHz Pentium-4 computer. The frame rate is well above that of real time video, which enables us to share the FPGA design among multiple video sources