A. Ehliar
Apr 29, 2012
Citations
0
Citations
Journal
2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines
Abstract
In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.