Process Placement in Multicore Clusters:Algorithmic Issues and Practical Techniques
E. Jeannot, Guillaume Mercier, François Tessier
Apr 1, 2014
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111
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IEEE Transactions on Parallel and Distributed Systems
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Key Takeaway Key Takeaway: This paper presents an algorithm and techniques for reducing communication costs in parallel applications on multicore clusters by matching communication patterns to the underlying hardware architecture.
Abstract
Current generations of NUMA node clusters feature multicore or manycore processors. Programming such architectures efficiently is a challenge because numerous hardware characteristics have to be taken into account, especially the memory hierarchy. One appealing idea to improve the performance of parallel applications is to decrease their communication costs by matching the communication pattern to the underlying hardware architecture. In this paper, we detail the algorithm and techniques proposed to achieve such a result: first, we gather both the communication pattern information and the hardware details. Then we compute a relevant reordering of the various process ranks of the application. Finally, those new ranks are used to reduce the communication costs of the application.