In order to fully verify the correctness of the design, random test generators are usually used in microprocessor verification. In this paper, a random cyclic testing system called RCTS is designed for multi-core and heterogeneous many-core processors. RCTS supports FPGA verification and can verify hardware logic and integrated implementation at design stage. RCTS also supports the verification of prototype chips. Especially in the system-level hardware-software co-verification, it can find hard-to-expose hardware design problems. RCTS can completely eliminate the need for architectural simulators to compare the results, so it can reduce the verification time and improve the verification efficiency.

RCTS is a multi-core processor verification system that reduces verification time and improves efficiency by detecting hard-to-expose hardware design problems and eliminating the need for architectural simulators.

RCTS: Random Cyclic Testing System

Key Takeaway: RCTS is a multi-core processor verification system that reduces verification time and improves efficiency by detecting hard-to-expose hardware design problems and eliminating the need for architectural simulators.