R. Porter, K. McCabe, N. Bergmann
Jul 19, 1999
Citations
2
Influential Citations
22
Citations
Journal
Proceedings of the First NASA/DoD Workshop on Evolvable Hardware
Abstract
We discuss the use of Field Programmable Gate Arrays (FPGAs) as hardware accelerators in genetic algorithm (GA) applications. The research is particularly focused on image processing optimization problems where fitness evaluation is computationally demanding and poorly suited to micro-processor systems. This research identifies key design principles for FPGA based GA and suggests a novel 2 stage reconfiguration technique. We demonstrate its effectiveness in obtaining significant speed-up; and illustrate the unique hardware GA design environment where representation is driven by a combination of hardware architecture and problem domain.