D. Tucker, Richard Y. Yang, Heather Maines
Jul 10, 2003
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Abstract
Cobalt Silicide (CoSi) is used to reduce contact resistance for sub-micron technology such as 0.25μm CMOS. At National Semiconductor, a thin oxide is used to protect areas that are not be silicided. The selective removal of this oxide to form the silicide mask is critical as it occurs in the highly sensitive cobalt silicide module where neither over nor under etch is acceptable. The final etch uses a low power, CHF2/Ar recipe with good across wafer uniformity. In keeping with the advance dprocess control methodgoy at National, the etch is end pointed to reduce wafer-to-wafer and etch chamber variability. This paper contains integation aspects of the cobalt silicide module as well as the specifics of the new etch process. The effects of power, pressure and gas flows and details of the end point set up are reviewed, as wel as cross section analysis and electrical responses.